MEMBER LOGIN

EVENTS

2017 Winter Conference

Salzburg, Austria

February 2 & 3

Review of Day 1, EIPC Winter Conference Salzburg February 2 & 3, 2017

 Cold! The Austrian city of Salzburg was the venue of the EIPC 2017 Winter Conference. Close to the border with Germany and divided by the Salzach River, the city offers spectacular views of the Eastern Alps. The Old City, with its many mediaeval and baroque buildings, the birthplace of the famous composer Mozart would be a nice place to visit …. in the summer.

Themed to address the question: “The Future Needs of the Global Electronics Industry: What Solutions will Europe Provide?” the conference was a truly international event, attracting delegates from thirteen countries, to hear a well-chosen programme of twenty presentations in five sessions, introduced by EIPC Chairman Alun Morgan. Beginning with figures borrowed from Walt Custer, showing growth rates of the global key end use electronics markets, Morgan highlighted three leading growth sectors: internet of things 21.0%, medical electronics 6.5% and automotive 4.0%, all of which had great significance in the European industry. Morgan described the internet of things as a combination of small things to make big systems, and demonstrated how self-learning systems relied on “things” with sensors sensing and transmitting data, to be stored, filtered, compressed and analysed, with decisions and actions fed back to the “things” in a continuous iterative loop, although relying on connectivity came with high costs and limitations.

Bosch had forecast that the car as we know it would soon be history, and that cars of the future would be an active part of the internet of things able to communicate with other connected modes of transportation. Self-driving cars would be good news for the safety of Morgan and his motorcycling associates, because eventually motorcycles would communicate with all of the other vehicles on the road, constantly reminding them where they were, where they were heading, and at what speed. “We can use that to build an electronic safety cage around a motorbike.” Still fun to ride, but less hazardous!

Morgan referred to the recent highly successful EIPC workshop on BioMEMS as his illustration of developments in medical diagnostics, and the concept of “lab-on-PCB” microfluidic systems, which would result in diagnostics and patient monitoring beyond the hospital or doctors surgery, into the home and connected to the cloud, all ready for the emerging connected world.

And all of these key growth sectors offered enormous opportunities to the European PCB industry.

Despite any precedent that might have been set by Donald Trump, Walt Custer resolved that his presentation would not be based on “alternate facts”, as he introduced his Business Outlook for the Global Electronics Industry with a cautionary reference to “Stressful times in Europe” as the UK prepared its exit from the European Union.

Custer’s view on the 2017 situation was that, with the exception of automotive, medical and semiconductor equipment, the global electronic equipment volume markets had been stagnant and emerging new volume products were not yet large. His global Purchasing Managers Index indicated a positive end to 2016, with year-on-year industrial production increases of 1.9% in the UK, 3.2% in the Euro Area, and 0.5% in the USA, compared with 6.0% in China and 5.7 in India, and suggested continuing growth in early 2017, but political uncertainty was strong in the USA and Europe. And there were ongoing concerns about the Middle East, Russia, North Korea and China.

Growth in PCB production was being hindered by copper foil shortages. The US dollar had strengthened significantly, resulting in cheaper imports and more expensive exports for US-based companies, but the strong dollar complicated global growth rate calculations and whilst dollar-denominated global electronic equipment growth rates were near breakeven when calculated at constant 2016 exchange rate, they dropped to a preliminary estimate of minus 3.6% at fluctuating exchange in the fourth quarter of 2016 compared with the same quarter of 2015. Electronic equipment growth in general had flattened and the ODMs were feeling the impact.  Custer expected that global electronics growth would be modest until the development of another volume end market product to rival PCs, media tablets and smartphones. In his opinion, the automotive market presented the best near term hope.

In summary, Custer concluded that business conditions were improving globally, although they required careful monitoring, and that Europe was relatively strong. End markets were growing especially automotive, medical and semiconductor fabrication equipment, and it was realistic to expect corresponding growth in European PCB manufacture. He predicted that 2017 would be a reasonable year, but that the geopolitical situation remained a major worry.

Theme of the first technical session was “New system designs and impact on materials and processes”, moderated by Alun Morgan, who introduced as his keynote presenter Stig Källman, global component engineer for PCB from Ericsson in Sweden, describing a PCB materials toolbox for today’s 3G and 4G networks and future 5G compliance.

“With the right recipe the taste is the same wherever you go…” Källman applied McDonald’s Big Mac logic to the selection and standardisation of raw materials for PCB laminates – glass, resin and foil, to ensure that Ericsson’s needs were consistently and uniformly met throughout the group, with cost-effective materials in good supply that had properties matched to performance requirements.

His toolbox recognised three application levels, Level 1 being for general purposes, Level 2 for groups of the same category, and Level 3 for supplier specific data. Standard procedure for selection of core di-electrics was to use the thickness as the input value in the build. For prepreg, the priority was to nominate the glass weave, then leave the supplier to use resin content to meet the nominal thickness.

Källman showed charts illustrating the impact of conductor geometry, dielectric spacing and dielectric constant  on impedance for microstrip and stripline designs, and listed cost index values for a range of core thicknesses and prepreg glass styles, then showed the whole range of halogen-free materials and their properties to meet Ericsson’s current and future needs, from basic FR4.1 through to advanced microwave substrates.

Although Helmut Kroener from Isola in Germany apologised in advance that his presentation was very data-heavy, he in fact gave a very clear and thought-provoking explanation of the influences of laminate and PCB manufacturing tolerances on patch antenna and feed network characteristics for very high frequency applications.

Taking as his example a 77GHz radar antenna, he demonstrated how the critical tolerances could be determined using a statistical technique known as Monte Carlo Simulation to study the impact of independent variables on desired performance characteristics. The procedure involved assigning a normal distribution for each independent variable, with user-defined mean and standard deviation,  then randomly picking values for each independent variable, based on the probability for normal distribution, with each variable pick being independent of the other independent variables, then running many thousands of simulation runs with vectors of dielectric thickness, line width, copper thickness, bulk dielectric constant and pad size as independent variables.

The simulation study showed that changing the tolerance on dielectric constant from +/- 0.05 to +/-0.02, which would be hugely expensive, had only minor effects on impedance and centre frequency, and that plated copper thickness had very minor influence overall. The largest influence came from etch tolerances, and the second largest was the dielectric thickness of the material. Kroener stressed the importance of laminate manufacturers having the right tools and capabilities to support the development of materials to fulfil customer requirements. He also proposed a performance-verification test that could be used by PCB suppliers for back-end-of-line testing, by incorporating an additional test coupon on the panel to enable measurement of resonance frequency with a vector network analyser.

The current growth of the mobile data traffic of portable devices and machine-to-machine communications dramatically challenges the 4G cellular networks currently under deployment. To help satisfy mobile data demand, there was an expectation that millimetre-wave architecture would be used for 5G cellular phone. What technology would be needed to provide the necessary antenna characteristics? Jim Francey (l) and Terry Bateman (r) from Optiprint in Switzerland demonstrated that PCBs offered an attractive solution for millimetre-wave hardware and discussed technology requirements for interconnect and antennae, with reference to the work they had carried out as collaborators in the MiWaveS FP7 project.

Several substrates had been evaluated and liquid crystal polymer material was identified as a good candidate, having stable dielectric constant through the required frequency range, low moisture absorption and comparatively low loss. And it was available in non-woven-based copper-clad laminate and matching bond ply, simplifying the design process. The main manufacturing challenge was material movement, and careful precautions were needed to achieve precision in registration and feature positioning.

In general the PCB technology required thin-core processing competence, fine-line tight tolerance conductors and the capability to manage variable material movement. Essential facilities were off-contact metrology, liquid resist, laser direct imaging, laser machining, automatic alignment systems for drilling, milling and routing, plasma treatment, cleanroom conditions and the right systems for test and inspection, together with a culture of working with small-form high-precision components and a policy of continuous investment.

Miniaturisation and increasing functionality in medical electronics, particularly in wearable and implantable devices continued to place increasing demands on substrate interconnection density. Karl-Heinz Fritz from Cicor, also in Switzerland, offered a practicable solution in his presentation on ultra-high-density-interconnection printed circuit boards.

Taking the simple example of a hearing aid, whose present function was simply to aid hearing, he predicted that “Hearing Aid 2.0” would incorporate a host of additional diagnostic and monitoring functions, but in the same size package. And with active components pitch sizes trending below 200 microns, and passives in 008004 format, established HDI technology could not offer sufficient routing density or component real-estate and was reaching its limit in terms of cost-effective high-yield production.

As well as their expertise in HDI PCB production, Cicor had long-term experience in thin film technology, which offered lines and spaces down to 10 microns but was expensive to manufacture and only available in small panels. They had now bridged the gap between the two technologies, and could offer an “ultra-HDI” solution with 25 micron lines and spaces, 90 micron capture pads and 35 micron holes, giving real estate savings of 37% on inner layers and 30% on outer layers compared with standard HDI. Their DenciTec product could be manufactured in 305mm x 457mm panels by all-PCB processes.

The final presentation in the morning session was given by Professor Rainer Thüringer, President of FED, the German-based professional association for design, printed circuit boards and electronic manufacturing.  His topic was EMC conformal board design, subtitled “It’s all about maximum inclusion of the operating RF energy”, which turned out to be an excellent basic tutorial on fundamental design principles.

He began by discussing how magnetic and electric RF-fields were created, the former by radiation by differential-mode currents generating RF-magnetic dipole fields, the latter by radiation by common-mode currents caused by inductive coupling generating an electric dipole field, then went on to describe how these effects could be mitigated by good design practice.

He explained with clear illustrations how energy was distributed between paired traces on the same layer, paired traces on two layers, and single traces over a ground plane, and emphasised the significance of proximity effects in keeping the energy entrapped. Effectively the return current always took the path of lowest impedance, and for pulses with high frequency content the path of lowest inductance, which was underneath the trace. Discontinuities in the ground plane would cause the return signal to find another route, which would result in RF radiation and disturb the quality of the signal. He showed many examples of good practice in grounding and filtering, and minimising inductive loops on power connections, before focusing on PCB stackup for EMI control and signal integrity, with expert guidance on positioning of power supply and reference planes, controlled impedance, crosstalk reduction and screening, remarking that more than four layers were required if good signal integrity and EMC performance were required.

The afternoon proceedings began with a session entitled “Advanced component and attachment technologies for high first pass yields”, moderated by Christian Behrendt.

The first presentation came from Wolfgang Schmitt of Heraeus Electronics in Germany, who described a sinter paste which provided a pressure-less low temperature alternative to soldering for nickel-gold PCB substrates, primarily designed for automotive and power electronics applications. The material had been created originally for the Asian market but was now available in Europe. It offered potential advantages in manufacturing costs, process costs and material costs.

He explained the principles of sintering: a metallic powder coalescing into a solid or porous mass by diffusion alone, without going through a molten phase, under the influence of heat and usually pressure. A range of pastes was available, but the one of interest, based on micron-sized silver powder, was capable of being sintered at 200°C without the application of pressure. The resulting material was not completely solid; the residual interstices between the silver particles effectively amounting to about 35% porosity, and this gave benefits in resilience, with a low elastic modulus. Bond strength to nickel-gold was excellent and under shear stress the failure mode was cohesive rather than adhesive. Thermal conductivity and electrical conductivity were superior to solder. The only disadvantage in production was the time taken for the sintering operation, which could be as long as three hours. IR sintering offered a route to shorter process times and current work indicated that a 40 minute process was feasible.

#

“Future electrical property needs drive semi-additive processes into high volume PCB manufacturing” was the title of the presentation of Uwe Altmann from Orbotech in Belgium, a regular contributor to EIPC conferences. He reviewed industry trends in hand-held devices, focusing on PCB needs for 5G operation, where 75.4 billion end units were forecast to be use by 2025. Operating frequencies greater than 6GHz were anticipated, so close-tolerance conductor geometries and impedance control would become increasingly important, and with component pitches trending to 0.3mm and below, lines and spaces of 30 microns and less would be required. These advanced HDI designs were beyond the capability of existing panel-plate tent-and-etch fabrication processes and an alternative approach was required, with the capability to produce precision fine-line PCBs cost-effectively in high volume.

Altmann described the modified semi-additive process mSAP which is becoming adopted as the mainstream process to carry HDI into the next generation. Starting with 3 micron copper, the sequence was: laser drill, electroless copper, pattern plate, strip resist, flash etch. Orbotech had developed the enabling imaging technology in their Nuvogo Fine series of direct imaging systems, which gave optimal line definition down to the 10 micron line and 15 micron space level and registration accuracy of +/- 7.5 microns, with multiwave laser and large scan optics for maximum throughput.

Stephan Kunz from Schmoll in Germany talked about registration, improving yield and reducing costs of the PCB manufacturing process.

From their long-term background in CNC drilling and routing machines, Schmoll had progressively and strategically extended their range of equipment to include inner-layer exposure, post-etch punching, x-ray drilling, direct imaging, soldermask exposure and scoring, all of which drew on one common theme – registration. The company was becoming increasingly focused on software and Kunz described how building databases of preventive knowledge could improve the quality of registration and consequently increase yield. Critical data feedback drawn from these systems could be implemented for continual improvements minimising fabrication tolerances.

Having discussed the options for effective panel identification, he went step-by-step through the manufacturing sequence, at each stage listing how quality improvement could be achieved, traceability could be maintained, registration accuracy could be maximised and tolerances minimised and useful data generated, collected and fed back for ongoing process optimisation. Putting the sequence together, he demonstrated how all the elements of the process-tolerance chain added up, and showed how the chain could be optimised and tolerances reduced by direct imaging, optical inner layer registration and CCD drilling.

Theme of Session 3 of the conference was developments in soldering and solderable finishes, and the session was moderated by Martyn Gaudion from Polar Instruments in the UK.

Despite concerns about corrosion, electroless nickel immersion gold (ENIG) remained the most popular metallic solderable finish for PCBs. Chris Klok from MacDermid Performance Solutions in Germany discussed advancements in electroless nickel immersion gold chemistry, with particular reference to recent studies to characterise, understand and control of electroless nickel corrosion effects.

He explained that, in fact, the deposition process for immersion gold on electroless nickel relied on a controlled-corrosion galvanic displacement mechanism , and that too much, or too much localized, galvanic displacement could lead to excessive corrosion and increased risk of solderability failures through weak solder joints. Corrosion levels and acceptability remained a grey area and could be the cause of dispute when solderability failures were experienced. It had been found that three main factors needed to be addressed in order to deliver consistent and low electroless nickel corrosion: control of the electroless nickel deposit phosphorous content, control of the galvanic displacement reaction in immersion gold chemistry, and control of the gold metal thickness and distribution.

Higher phosphorous content electroless nickel deposits had been recognised as having increased corrosion resistance over lower phosphorous containing deposits, but it was difficult to build higher gold thickness if the phosphorus content was more than 10%, and deposits were more prone to gold adhesion failure. Traditional ENIG systems relied on pH control of the electroless nickel plating rate, but as the chemistry aged, increase in pH resulted in a reduction of the phosphorous content which reduced the corrosion resistance of the electroless nickel deposit. MacDermid had optimised the electroless nickel chemistry to maintain a consistent phosphorus content about 9%, and had incorporated surface-active agents into the immersion gold chemistry to inhibit the corrosion effect and improve the uniformity of gold thickness.

Klok commented that the IPC4552 ENIG specification now included a rating system for nickel corrosion, which would provide guidance and uniformity when corrosion was under dispute and a methodology for process control and monitoring.

There had been renewed interest in vapour phase reflow technology, particularly for lead-free soldering, where benefits such as enhanced wettability and temperature homogeneity with no risk of overheating could be realised. Emmanuelle Guéné from Inventec Performance Chemicals in France reported the results of a reliability study of no clean chemistries for lead free solder paste in vapour phase reflow.

The study set out to compare firstly the cleanability and secondly the chemical reliability of several solder paste residues after soldering in convection or vapour phase reflow.

For the cleanability experiments, four pastes were chosen, of which three were nominally no-clean. Test assemblies were subjected to aqueous detergent spray at different concentrations, co-solvent cleaning and mono-solvent cleaning. Although it had been expected that the vapour-phase reflowed samples would be more easily cleaned, no significant differences were observed, and it was concluded that the nature of the solder paste and the cleaning process have more influence on the results than the reflow method itself.

In the second part of the study, four no-clean pastes were subjected to SIR testing to IPC TM 650 2.6.3.3 Rev. A, and to the harsher BONO residue corrosivity assessment test. It was observed that SIR values were always slightly lower after vapour phase reflow, and that pastes that were close to the SIR limit when reflowed in convection might fail if reflowed in vapour phase. It was concluded that if high chemical reliability was desired, it was advisable not to use “aggressive” activators such as halogen, especially with vapour phase reflow. Regarding test methods, it was commented that because the Bono test is more drastic and more sensitive than standard SIR test, it is being used as a tool for solder paste development and was capable of predicting the risk of solder pastes generating corrosion in harsh environments.

A second presentation from Inventec Performance Chemicals was given by Patrick Duchi, on the subject of optimisation of chemistry for a vapour phase de-fluxing process for no-clean lead-free materials.

Reviewing trends in electronics assembly, he made it clear that miniaturization, together with lead-free soldering and the use of no-clean fluxes was having a direct impact on the cleanability of PCB assemblies. And one of critical consequences of miniaturisation, so far as it affected cleaning, was the smaller standoff under components. Legislation had restricted the choice of available cleaning products, but there was still a range of products available, including those based on detergents and surfactants, petroleum distillates, formulated hydrocarbons, terpenes, glycols, hydrofluorocarbons and hydrofluoroethers.

He discussed the significance of contact angle, surface tension and viscosity, and the concept of solvency power as measured by the KB (Kauri-Butanol) index, and listed typical compositions of flux residues, then presented the results of a series of case studies designed to compare the performance of a range of cleaning formulations across a range of equipment types, measured by visual inspection and ionic contamination testing.

The results indicated that the cleaning process should include mechanical agitation, and that ultrasonics had not been observed to cause damage to quartz components.

In terms of performance, a segregated co-solvent process using a hydrofluoroether azeotrope had shown particularly good results, especially with immersed jet agitation, in removing all types of flux residue, and in terms of comparative cleaning costs, the segregated co-solvent process was also the most economical.

The final presentation of the first day was given by Professor Karl Ryder from the University of Leicester in the UK, presenting the findings of the MACFEST project. It was interesting to compare the content of this presentation with the earlier one from MacDermid, since electroless nickel corrosion effects in the ENIG process were of relevance in both. Whereas the MacDermid development had centred on the optimisation of traditional aqueous chemistry, the MACFEST project had approached the problem from a different angle, using ionic liquid chemistry as the basis of the immersion deposition process.

Professor Ryder explained the characteristics of ionic liquids and described a specific class known as deep eutectic solvents, which were readily and cost-effectively available. The example used in the MACFEST project was a mixture of choline chloride and ethylene glycol, which had unusual solvation properties for metal salts and had been demonstrated in several metal finishing applications to have the ability to modify the electrochemical characteristics of metal ions in solution.

The MACFEST project had set out to develop “universal surface finish” for PCBs, wire-bondable as well as solderable, using a conventional proprietary electroless nickel as a base on which to deposit immersion palladium followed by immersion gold, both from ionic liquid chemistry. The “ENIPIG” finish had been independently tested for solderability and had shown excellent results, comparable with existing finishes. Moreover, focused ion beam cross-sectioning had shown no evidence of the grain boundary corrosion on electroless nickel characteristically associated with aqueous deposition.

A long conference day was rounded off with a visit to the spectacular Red Bull Hangar-7, owned by Red Bull founder Dietrich Mateschitz, with its collection of historical aeroplanes, helicopters and Formula One racing cars, followed by a conference dinner at the M32 restaurant, high above the Mönchsberg museum of modern art, with panoramic views over the city of Salzburg.

Review of Day 2

Almost everyone made it back to the conference room for the start of the second day of the EIPC Winter Conference in Salzburg, even those who had enjoyed the late networking session into the early hours!

 I-Connect007 Technical Editor Pete Starkey had the privilege of moderating the first session, the theme of which was “Future Electronic Application and Impact on Reliability and Safety”, and his first presenter was Emma Hudson, UL’s Industry Lead for PCBs in Europe, the Middle East, Africa, and Latin America, and a member of the EIPC Board of Directors. She expertly steered delegates through the myths and mysteries of the safety certification process in a presentation entitled “UL PCB Recognition:  A 20 minute guide to the UL 796 Safety Standard”

She began by explaining that UL Recognition of components was driven by end product safety concerns around fire and electric shock, and that UL’s PCB Requirements provided data characterising the behaviour of materials and PCBs, for use by the material manufacturer, the PCB fabricator and the end-product manufacturer as a guide in the design for safety in the use of components in devices or appliances.

There were four primary sections in UL 796: Introduction, Construction, Performance and Markings, plus a supplement to cover follow-up inspection. The standard only applied to rigid PCBs; flexible constructions were covered separately under UL 796F. Some of the terminology differed from common industry jargon; for example a “single layer board” meant one with a single dielectric layer, not a single copper layer.

The Introduction section defined the parameters that would be evaluated. The section on Construction covered all the details required for a PCB to be “Recognized” – materials, build-up, parameters and manufacturing process. The Performance section covered test sample build-up requirements and test coupon design, and details of all the testing required. For full recognition, it was necessary to carry out all the tests; for flame-only recognition, only thermal shock and flammability were required. The Marking section defined all the mandatory marking requirements: company identification, factory identification, board type designation and UL recognition mark.

She made it clear that UL standards were consensus-based, and that the Standards Technical Panel (STP) process was governed by ANSI approved regulations. UL itself had only one vote, and of the 45 current panel members only two were from Europe. More representation from Europe was welcomed. “You can help to shape the UL Standards”

Against the background picture that Emma Hudson had painted, a PCB industry user-perspective was presented by Jürgen Deutschmann, Supplier Quality Manager for AT&S Austria with responsibility for UL across the global AT&S group.

“What does the customer want to have?” was the fundamental question the PCB manufacture needed to be sure to understand at the outset of a customer project. Full recognition? Flame-only recognition? What kind of maximum operating temperature? What kind of flammability class? What materials or material combinations? Then, having clearly understood the customer requirement, to check what was in the PCB manufacturer’s existing UL File and whether it was necessary to start a new UL project, in the knowledge that if any of the materials used was not UL Recognized it cost a lot more money and running time.

In Deutschmann’s experience, to get a material recognised took 2-3 months for flame only recognition, and 5-6 months for full recognition, and he illustrated the sequence of release and the extensive schedule of testing that had to be completed.

He showed an example of a PCB manufacturer’s UL listing file and explained the significance of pattern limits, solder limits, maximum operating temperature, UL 94 flammability class and applicable solder resists, then clarified  the procedure for correct UL-marking – what was mandatory and what was at the customer’s request.

“And now for something completely different” – Starkey introduced solder resist specialist Don Monn from Taiyo America, always a popular speaker at EIPC events, who prompted enormous interest from delegates with his presentation on heat-spreading solder resists.

Monn explained that conventional liquid photoimageable solder resists are relatively poor conductors of heat, but that dense PCB assemblies generate heat that needs to be dissipated by all means possible. And this had been an incentive for Taiyo to develop a new high-thermal-conductivity solder resist. Whereas a conventional resist formulation had small amounts of pigments and inorganic fillers in a continuous resin phase, and these components contributed little in the way of thermal conduction, the new formulation was heavily loaded with a thermally conductive ceramic material which provided a heat path between the PCB substrate and the outside environment where it release the heat by radiation and convection.

The thermal conductivity of the new resist had been measured by the laser flash method, in which a laser pulse of 1 millisecond or less was used to momentarily heat the front side of a 2mm thick sample, and the back side temperature change was measured. The back side temperature increased until it reached a constant value and the coefficient of thermal diffusivity could be calculated, which when multiplied by specific heat and density gave a thermal conductivity figure in Watts per metre Kelvin W/mK. The actual figure for the new formulation was 2.2W/mK, compared to 0.2 W/mK for a standard liquid photoimageable.

Monn demonstrated diagrammatically the routes by which the thermally-conductive solder resist acted to dissipate heat from component terminations and circuit features, supported by test results showing measured reduction in chip operating temperatures. The material had been subjected to exhaustive thermal cycling, with no cracking or peeling observed. It had very low moisture absorption characteristics and good resistance to ENIG chemistry. Because of the high filler content photospeed was reduced, although the material remained suitable for laser direct imaging, with resolution equivalent to that of a standard liquid photoimageable solder resist.

The final session of the conference was moderated by EIPC Technical Director Michael Weinhold, on the theme of reliability of PCBAs and PCBs.

His first presenter was Robert Boguski, (below) President of Datest, a company of specialist test engineers for assembled boards based in the USA. Boguski gave an enlightening insight into the world of non-destructive failure analysis, subtitled “Image and reality – matching findings (facts) with expectations (theories) – or not: Case studies from the coalface”.

Highly experienced in the interpretation of 2D and 3D X-ray images, backed by CT scanning capability, Boguski’s team effectively acted as a second pair of eyes to objectively examine what the customer had identified as a defective assembly. Was the customer always correct? Not very often! Customers with failed boards generally had predetermined notions of why their boards failed, often accompanied by assumptions that the root cause of failure lay with the highest-density components, for example BGAs, but in reality these failures tended to lie elsewhere, for example resistors, capacitors, and other areas of the board. Boguski’s people had no preconceived ideas, just the benefit of understanding what they were looking at, and were particularly skilled in pattern recognition and spotting anomalies.

He showed many examples of case-histories, in each case quoting what the customer had originally assumed was wrong and what was eventually found to be the real case – often a completely different story and often much more wrong than was originally thought. Significantly, bare-board defects were rarely seen – most were assembly-workmanship problems

In some cases, Datest were able to identify and repair faults and bring failed assemblies back to full working order, in many instances recovering thousands of dollars-worth which would otherwise have been written-off. “Bone-pile

rehabilitation” Boguski termed it, to the amusement of delegates. Whatever, Boguski was pleased to report: “Customers arrive confused and under pressure, and leave relieved and enlightened!”

Because Polar Instruments is nowadays recognised as the generic source of stack-up software for high-speed circuits, it is often overlooked that ever since its foundation 40 years ago, Polar has been involved in testing assembled boards. Hermann Reischer from Polar Instruments GmbH in Austria, gave a very informative presentation on efficient test methods for prototype builds and small batch production in electronics assembly.

Reischer reviewed the principles, advantages and limitations of a range of test methods: Functional Test, which checked for component internal functions, correct programming, etc. but located the result of a fault, not the root cause, In-Circuit-Test, which required complex programming and complex board interfacing, and Boundary-Scan-Test, which had simple interfacing but required complex programming, before discussing the principles of Analog Signature Analysis.

He explained that Analog Signature Analysis relied on a change in electrical characteristics to detect problems on a circuit board and would find typical production faults and defective components. It required no component library, was technology-independent, tested in the unpowered condition and programming was simple from a golden board. The technique did not measure component values or tolerances, gave limited test coverage for component internal faults and timing or thermal faults, and required some interpretation by the user.

The technique was to apply a current-limited AC sinewave across two points of a component or circuit, and display the resulting current/voltage waveform as a unique analog signature superimposed over a reference signature of a known good board. By comparing the signatures of known good circuit boards to those of suspect boards, faulty nets and components could be quickly identified. Reicher showed a series of illustrations of typical faults that had been identified. Polar had launched a new semi-automated graphical repair system, suitable for low volume high value production or R&D prototype testing and field returned repairs on high density loaded circuit boards.

The final presentation of the second day was given by Andreas Gombert from Ilfa in Germany, with a PCB manufacturer´s view on tolerance requirements for reliable PCBs. He explained that there were many tolerances defined for different features of PCBs, for example for annular rings, barrel thickness, registration, dielectric spacings and conductor patterns. Some were defined in standards such as IPC 2221. Some were based on specific project requirements, for example high speed designs or HDI applications.

It was generally anticipated that conformity with the design ensured reliability for the complete assembly, although in general it was difficult to prove that conformity equalled reliability.  He therefore presented the viewpoint of a PCB manufacturer on what he considered to be five of the most critical tolerances based on empirically gained experience: annular rings, barrel thickness, dielectric spacing, solder mask thickness and surface finishing. For each topic, he discussed the tolerance requirements in detail and gave examples of characteristic findings that would indicate a potential failure and therefore a reliability concern.

He concluded that the definition of minimum pad sizes to achieve annular rings in accordance with IPC2221 was justified for difficult material combinations. Depending on the stack-up, smaller production tolerances were feasible but require case-by-case consideration. With respect to barrel thickness, his recommendation was to fulfil IPC Class 3 requirements even for Class 2 boards. He also recommended having positive etch-back in the range 5 – 10 microns. Dielectric spacing was critical for impedance-controlled conductors; the smaller the dielectric spacing, the larger was the impact of variations on impedance. The solder mask thickness had an impact on solderability, dielectric strength, and protection against the chemistry used in surface finishing, as well as on impedance. Finally, the tolerances of the surface finish influenced solderability, bondability and corrosion. He concluded by suggesting that anyone buying PCBs should first talk to their board supplier about tolerances: “They know what works and what does not, and what can be achieved…”

The proceedings were brought to a close by Alun Morgan, who thanked all present for supporting the event; the speakers for sharing their knowledge and experience the delegates for their attention and their participation, the sponsors Adeon, Isola, Polar and Ventec, and especially to Kirsten Smit-Westenberg and Carol Pelzers for their superb organisation of another successful EIPC conference. Morgan extended a warm invitation to everyone to come to Birmingham in the UK for the Summer Conference on 1st-2nd June.

Price

MEMBERS (early) 600.-

MEMBERS (regular) 725.-

NON-MEMBERS (early) 780.-

NON-MEMBERS (regular) 900.-

REGISTER ONLINE

Sponsors

  • Adeon logo PMS109C 2014 smallVentec for web Isola for webPolar for web

SITEMAP FEEDBACK

Please provide some more details

FIND OUT MORE

Please login or register

Layer-70

EIPC membership has many advantages, both financially and in services. Such as:

REGISTER NOW

You must be a member to view this content

Layer-70

EIPC membership has many advantages, both financially and in services. Such as:

REGISTER NOW

Please Login / Register

IM NOT REGISTERD TO EIPC
IM REGISTERD TO EIPC

Please provide some more details

Please provide some more details

Thank you!

An EIPC staff member will contact you soon to arrange payment.

Please fill in the form

EIPC will send an invoice to you through email and discuss your yearly fees.


Notice: Undefined index: partnerportal_partnership in /home/eipc2273/public_html/wp-content/plugins/eipc-partner/activate.php on line 77

Notice: Undefined index: eipcevent_category in /home/eipc2273/public_html/wp-content/plugins/eipcevent/activate.php on line 77

Notice: Undefined index: eipcpublications_category in /home/eipc2273/public_html/wp-content/plugins/eipcpublications/activate.php on line 89